Speaker
Simon Schlepphorst
(Forschungszentrum Jülich)
Description
Developed under the European Processor Initiaive (EPI) the STX stencil/tensor accelerator aims to achieve a 5-10x higher energy efficiency over general purpose compute units.
The architectue consists of specialiced MIMD compute units which are supported and controlled by RISC-V cores.
We describe a co-design effort between hardware, software, and application development focused around porting a LQCD benchmark to this new architecture.
Primary author
Simon Schlepphorst
(Forschungszentrum Jülich)
Co-author
Stefan Krieg
(JSC, Forschungszentrum Juelich/HISKP, University of Bonn)
